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  • Welcome to all students who register this course.

Course Description[edit]

This course will provide an overview of the MOS transistor, circuit characterization and performance estimation. CMOS logic and structured design: electrical design of logic circuits, clocking strategies and design rules. CMOS systems and RISC architectures.

  • Objectives:
    • Ability to understand the functions and the properties of CMOS devices, combinational gates, and sequential circuits
    • Ability to analyze the performance and power consumption of a digital VLSI circuit using proper device and interconnect models
    • Ability to design functional units such as adders and multipliers using CMOS devices
    • Ability to optimize a digital circuit with respect to different quality metrics such as cost, speed, power dissipation, and reliability
    • Ability to use Cadence layout design tool and HSPICE for VLSI circuit design and analysis

All course announcements, lecture slides, assignments, and projects will be made available on Blackboard, please frequently check the site and contact the instructor if there is any question.

Prerequisites: EECE 351 or equivalent.


Prof. Zhanpeng Jin
Department of Electrical and Computer Engineering
Email: zjin at binghamton dot edu (preferred)
Phone: 607-777-3363


  • Lecture: Tuesday/Thursday 10:05am ― 11:30am @ SSW-204
  • Office Hours: Tuesday 1:00pm ― 3:00pm @ ES-2306


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